Wafer & Chip Test

ELMOS tests the functions and parameters of the ICs by using modern mixed-signal test systems, combined with efficient multi-side handling systems and wafer probers.

Developing an ASIC test concept starts in the early phase of product development by working closely with the circuit designers. By using the resulting test programs, the function of all ICs is tested first at wafer level and then in its packaged form after assembly.

Wafer probing is highly automated and takes place in clean room conditions. First of all, each wafer is parametrically classified. After this, the individual chips (dies) on the wafer are tested for functionality, if required at different temperatures.

After assembly, the products are inspected according to package in a final part test. This is based on test specifications agreed upon with the customer and also a product-specific test plan. Fully-automated handling systems enable function tests to be carried out in a temperature range of between -40°C and +150°C.

Additionally, products can be dynamically aged (burn-in process). Potential early failures can hereby be recognised in time and removed from production.

Nearly all ICs are taped on reels to ensure easy processing onto the customer’s automatic placement system. When taping the products, before delivery to the customer every single final part runs through an optical inspection to ensure the mechanical tolerances.